Abstract: This article presents a residual feedback neural network (RFNN) calibration technique for a pipelined-SAR analog-to-digital converter (ADC), which corrects the interstage gain error, ...

In popular media, “AI” usually means large language models running in expensive, power-hungry data centers. For many applications, though, smaller models running on local hardware are a much better ...

Integrating ADCs that provide accurate results without requiring a precision integrator capacitor has been around for a long time. A venerable example is that multimeter favorite, the dual-slope ADC.

Abstract: A 320MS/s 14bit pipelined SAR ADC in 40nm CMOS technology is presented in this paper. Considering the non-ideal factor of key nodes caused by many modules connected to them, and mismatch ...

A dual-capacitor array features two discrete multilayer ceramic chip capacitors packaged in a single miniature 0405 chip to enable pc-board space savings. The array is offered in NPO dielectric with ...