Business Wire

Cadence Digital, Custom/Analog Design Flows Certified and Design IP Available for Intel 16 FinFET Process

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced its digital and custom/analog flows are certified on the Intel 16 FinFET process technology and its ...
Semiconductor Engineering

Boost High-Performance IC Design Flows With Early Interactive Symmetry Checking

In the realm of high-performance IC (integrated circuit) design, symmetry is not just an aesthetic preference—it’s a critical factor for ensuring proper device functionality, especially in analog and ...
Business Wire

Cadence Digital and Custom/Analog Design Flows Certified for TSMC’s Latest N3E and N2 Process Technologies

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced its digital and custom/analog flows have been certified to support TSMC’s new Design Rule Manual (DRM) ...
Digi Times

Synopsys certifies AI design flows on Samsung 2nm

Synopsys has announced that its AI-driven digital design and analog design flows have achieved certification on Samsung Foundry's SF2 process with multiple test chip tape-outs. The reference flows, ...