With performance optimizations seemingly having lost their relevance in an era of ever-increasing hardware performance, there are still many good reasons to spend some time optimizing code. In a ...

Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...

Artificial Intelligence has become a pervasive technology that is being applied to solve today’s complex problems, especially in the areas involving exponentially large amounts of data, their analysis ...

Getting an integrated circuit (IC) from design to test is an arduous process that encompasses a number of steps, including: This is an iterative process and can take months, so every step should be ...

ATPG targets faults at IC-gate boundaries, but 50% of defects are located within cells. Learn how cell-aware ATPG and user-defined fault models help to ferret out these hard-to-squash bugs.