Scan testing has been the foundation of digital-device production test for many years. Several innovations have been developed to keep up with the growth in pattern-set sizes brought about by large ...

The semiconductor industry has long relied on scan ATPG (automatic test pattern generation) tools instead of functional test to create stimulus-response patterns with very high fault coverage. But ...

There is a rapidly growing interest in the use of structural techniques for testing random logic. In particular, much has been published on new techniques for on-chip compression of automatic test ...

New semiconductor technologies like FinFETs are giving rise to new types of fault effects not covered by standard stuck-at and at-speed tests. Automatic test pattern generation (ATPG) tools perform ...

The trend in semiconductors leads to more IC test data volume, longer test times, and higher test costs. Embedded deterministic test (EDT) has continued to deliver more compression, which has been ...

Recent and continuing trends in the semiconductor industry pose challenges to IC test-data volumes, test application times, and test costs. The industry has thus far succeeded in containing test costs ...

Moore’s law has been the standard reference for semiconductor scaling. It roughly says that semiconductor design sizes, fueled by technology improvements, double every two years. Consequentially, the ...

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BANGALORE, INDIA: Magma Design Automation Inc., a provider of chip design software, and LogicVision Inc., a provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, announced that ...