EDN

FPGA-based coprocessors simplify ASIC emulation

With compressed time lines and intense pressure to get it right the first time, ASIC emulation has become an increasingly critical part of the design process. Designers have historically had few good ...
EDN

Knowledge of clocking aids ASIC-emulator choice

Originally, ASIC emulators used simple clocking—the target system supplied it. However, as custom-processor-based emulators emerged and manufacturers added multiplexed I/O capabilities to increase the ...
Business Wire

Aldec Cuts ASIC Design Prototype Bring-Up Time with HES-DVM’s Automatic Partitioning Tool and Faster HDL-to-FPGA Compilation Times

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has introduced automatic FPGA partitioning to ...
Embedded

Moving from FPGA to ASIC for your AI chip? Here’s what you should know

Perhaps you are designing an embedded inference engine for edge computing. Or you are taking the next step in automotive vision processing. Or maybe you have an insight that can challenge Nvidia and ...
Business Wire

Aldec Shortens Time of ASIC Design Prototype Bring-up in FPGA with HES-DVM Proto Mode

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for ASIC and FPGA designs, has unveiled the latest release of HES-DVM™, the ...
Seeking Alpha

AMD Introduces World’s Largest FPGA-Based Adaptive SoC for Emulation and Prototyping

ꟷ AMD Versal Premium VP1902 adaptive SoC offers 2X the capacity of previous-generation FPGAs, providing chipmakers with the tools to bring new ASIC and SoC designs to market faster ─ ꟷ Collaboration ...
Semiconductor Engineering

Beyond The Water Cooler: 2020 Report On IC/ASIC Design And Verification Trends

Verification and design engineers like to talk shop and discuss their experiences and visions. But even though engineers sharing stories around the water cooler (whatever form that takes—conferences, ...
AV Network

Justin Kennington on AV Supply Chain Using FPGA vs. ASIC Chips

SDVoE Alliance President, Justin Kennington shares his perspective on how FPGA versus ASIC chips impacts the product supply chain in the AV industry. When you purchase through links on our site, we ...
Nasdaq

AMD Introduces World’s Largest FPGA-Based Adaptive SoC for Emulation and Prototyping

ꟷ Collaboration with EDA leaders Cadence, Siemens and Synopsys helps ensure chip designers have access to scalable ecosystem of fully-featured solutions ꟷ Confidently Emulate and Prototype ...