EDN

SRAM System

Implemented the Intel 2147 SRAM (4K bit) based on CMOS‐based 6T SRAM cell (Virtuoso). * Used Divided Word Line (DWL) architecture to improve access time. * Used Address Transition Detection (ATD) ...
Ars Technica

4T SRAM, 6T SRAM, EDRAM, DRAM, and 1T-SRAM for CPUs

These are various forms of local, on-chip memory. Except for the DRAM. 4T (4 transistor) SRAM takes up 4 times the space that regular DRAM does 1T-SRAM seems to be a hybrid of DRAM that allows for ...
EDN

1-Transistor SRAM Cell Scales to FinFET Technology Node

Zeno’s one-transistor Bi-SRAM uses a single transistor and is ~5× smaller than a conventional SRAM — which uses six-transistor bitcells (6T-SRAM) — at the same technology node One way to look at a ...
Electronic Design

SRAM Deliver Higher Density Than 6T Solutions

Toted as the industry's highest density SRAM devices, the 72 Mb no bus latency (NoBL) burst SRAM family employ a patented one-transistor enhanced SRAM technology to achieve the same speed, four times ...